have: Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7, Xilinx UltraScale; Intel (Altera) or Microsemi (Actel) Fast interfaces such as PCIe, Ethernet, and JESD Auto-generated code using model driven engineering using Matlab and Simulink tools Derivation of detailed Firmware More ❯
work. Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM. FPGA architectures such as Xilinx 7, Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. Auto-generated code using model driven engineering using Matlab and Simulink tools. More ❯
have: Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7, Xilinx UltraScale; Intel (Altera) or Microsemi (Actel) Fast interfaces such as PCIe, Ethernet, and JESD Auto-generated code using model driven engineering using Matlab and Simulink tools Derivation of detailed Firmware More ❯
Responsibilities Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet, and JESD is also required. Auto-generated code using model driven engineering using Matlab and Simulink tools More ❯
Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA Place and Route. Ability More ❯
Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA Place and Route. Ability More ❯
Verilog Experienced with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa and Precision Familiar with Xilinx/Intel (Altera)/Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third-party synthesis tools Experience in specifying timing and area constraints for efficient FPGA Place and Route. Ability More ❯
the following areas, depending on the level of role you are aiming for: Experience using FPGA technologies from either Xilinx, Intel (Altera) or Microsemi (Actel) and their tools. Experience in verification techniques using either VHDL or System Verilog/UVM. Experience in specifying timing and area constraints for efficient More ❯
designs through the company firmware process. Modification of existing firmware designs and test benches. Skills Essential Using FPGA technologies especially from either Xilinx, Microsemi (Actel) or Lattice and their tools. Advanced verification techniques using either VHDL or System Verilog/UVM. Specifying complex timing and area constraints for efficient More ❯
existing firmware designs and test benches. What we are looking for: What you really must have: Using FPGA technologies especially from either Xilinx, Microsemi (Actel) or Lattice and their tools. Advanced verification techniques using either VHDL or System Verilog/UVM. Specifying complex timing and area constraints for efficient More ❯
protect personnel from threats like Improvised Explosive Devices (IEDs) in both military and civilian environments. Essential: Using FPGA technologies especially from either Xilinx, Microsemi (Actel) or Lattice and their tools Advanced verification techniques using either VHDL or System Verilog/UVM Specifying complex timing and area constraints for efficient More ❯
