1 to 25 of 26 RISC-V Jobs in the UK excluding London

Experience with Zephyr RTOS and open-source RTOS ecosystems. Experience contributing to and working with open-source ecosystems. Understanding of heterogeneous architectures (ARM, RISC-V, DSPs, custom SoCs). Experience integrating AI/ML for embedded optimization or tooling automation. Familiarity with TypeScript, Node.js, Rust, etc for command More ❯

Further development of proven prototypes to a deployment standard Development of software in a real-time embedded environment using Linux. (e.g. Microblaze or RISC-V using C/C++) ABOUT YOU Experience programming Embedded Systems using C/C++ Experience of bare-metal and embedded Linux environments Knowledge More ❯

CPU Verification Engineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems … languages. Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines). Familiar with the ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores. Strong understanding of modelling microprocessors using More ❯

CPU Verification Engineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems … languages. Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines). Familiar with the ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores. Strong understanding of modelling microprocessors using More ❯

CPU Verification Engineer We are currently hiring for an experienced Hardware R&D Engineer focusing on CPU and RISC-V Cores. You will be responsible for the development of a brand new and competitive CPU architecture, and defining interfaces between hardware, firmware and the operating systems for systems … languages. Understanding of CPU architecture and micro-architecture features (such as caches, MMU, SMP, coherency, CPU pipelines). Familiar with the ARM/RISC-V/MIPS architecture and the micro-architecture of current ARM/RISC-V CPU cores. Strong understanding of modelling microprocessors using More ❯

Kingdom time type Full time posted on Posted 7 Days Ago job requisition id R-100181 About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest … across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits. At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and … out our website and Glassdoor pages. Job Description: Principal System and Software Architect The Role: Do you want to be part of the RISC-V revolution? RISC-V and SiFive are redefining computing platforms for the 21st century. As a System and Software Architect, you'll More ❯

unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language … CodAL , and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including … motivated self-starters who enjoy working on something revolutionary in an innovative company. To be responsible for the microarchitecture definition and implementation of RISC-V processors and extensions Processor development within the Codasip Architectural Language (CodAL) Undertaking design synthesis and results analysis to ensure PPA targets can be More ❯

unique competitive advantage by empowering their system-on-chip developers to build the most innovative products. Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language … CodAL , and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions. Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including … motivated self-starters who enjoy working on something revolutionary in an innovative company. To be responsible for the microarchitecture definition and implementation of RISC-V processors and extensions Processor development within the Codasip Architectural Language (CodAL) Undertaking design synthesis and results analysis to ensure PPA targets can be More ❯

will be within our Codasip Labs organization, where we work on cutting-edge technologies and prepare them for rapid commercialization. You will analyse RISC-V processor designs at the architectural and microarchitectural levels to determine security vulnerabilities, characterize the potential risk level and suggest and evaluate practical mitigations … A flexible and adaptable attitude to work A desire to learn and also positively influence technical direction What you might have: Experience with RISC-V processors Previous experience working with academia Experience with formal security verification Knowledge of advanced security countermeasures such as CHERI What's in it … a future of innovation together! We can't wait to see what you'll achieve at Codasip. Some useful Links on Codasip: Codasip RISC V Processor Solutions Design for differentiation: architecture licenses in RISC V Scaling is Failing - Dr. Ron Black, CEO, Codasip Codasip Labs to More ❯

will be within our Codasip Labs organization, where we work on cutting-edge technologies and prepare them for rapid commercialization. You will analyse RISC-V processor designs at the architectural and microarchitectural levels to determine security vulnerabilities, characterize the potential risk level and suggest and evaluate practical mitigations … A flexible and adaptable attitude to work A desire to learn and also positively influence technical direction What you might have: Experience with RISC-V processors Previous experience working with academia Experience with formal security verification Knowledge of advanced security countermeasures such as CHERI What's in it … a future of innovation together! We can't wait to see what you'll achieve at Codasip. Some useful Links on Codasip: Codasip RISC V Processor Solutions Design for differentiation: architecture licenses in RISC V Scaling is Failing - Dr. Ron Black, CEO, Codasip Codasip Labs to More ❯

believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient RISC-V CPU cores from scratch to power some of the most exciting applications - think high performance supercomputers and next-generation embedded systems. By also … impact. Join us in Cambridge or Bristol and be part of a team redefining what's possible in CPU design. You will: Verify RISC-V processors and extensions Develop verification solutions (e.g. test benches and test bench components, stimulus generation, formal environments) Collaborate with other engineers in a … ownership of a design block User knowledge of Linux to enable automation of common tasks Knowledge of versioning tools (Git, SVN) Knowledge of RISC-V Architecture Good knowledge of computer systems and architecture What's in it for you? Join a flexible, open and supportive team full of More ❯

believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient RISC-V CPU cores from scratch to power some of the most exciting applications - think high performance supercomputers and next-generation embedded systems. By also … impact. Join us in Cambridge or Bristol and be part of a team redefining what's possible in CPU design. You will: Verify RISC-V processors and extensions Develop verification solutions (e.g. test benches and test bench components, stimulus generation, formal environments) Collaborate with other engineers in a … of Linux to enable automation of common tasks Knowledge of versioning tools (Git, SVN) What we'd love you to have Knowledge of RISC-V Architecture Good knowledge of computer systems and architecture Experience with formal verification or other more advanced verification techniques. Experience with (or interest in More ❯

believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient RISC-V CPU cores from scratch to power some of the most exciting applications - think high performance supercomputers and next-generation embedded systems. By also … impact. Join us in Cambridge or Bristol and be part of a team redefining what's possible in CPU design. You will: Verify RISC-V processors and extensions Develop verification solutions (e.g. test benches and test bench components, stimulus generation, formal environments) Collaborate with other engineers in a … Experience with guiding, mentoring or coaching engineers Good knowledge of computer systems and architecture What we'd love you to have Knowledge of RISC-V Architecture Experience with formal verification or other more advanced verification techniques What's in it for you? Join a flexible, open and supportive More ❯

bridge the gap between architectural excellence and user experience. Required: 5+ years of relevant experience Familiar with CPU instruction set architecture, e.g. Arm, RISC-V Familiar with general purpose CPU micro-architecture, such as pipelining, out-of-order execution, and caches Strong data analysis skill and software development More ❯

Required Qualifications: 5+ years of hands-on experience in CPU architecture or related areas. Strong understanding of CPU instruction set architectures (e.g., Arm, RISC-V). Deep knowledge of CPU micro-architecture concepts including pipelining, out-of-order execution, and cache systems. Proficient in performance analysis and data More ❯

Required Qualifications: 5+ years of hands-on experience in CPU architecture or related areas. Strong understanding of CPU instruction set architectures (e.g., Arm, RISC-V). Deep knowledge of CPU micro-architecture concepts including pipelining, out-of-order execution, and cache systems. Proficient in performance analysis and data More ❯

Required Qualifications: 5+ years of hands-on experience in CPU architecture or related areas. Strong understanding of CPU instruction set architectures (e.g., Arm, RISC-V). Deep knowledge of CPU micro-architecture concepts including pipelining, out-of-order execution, and cache systems. Proficient in performance analysis and data More ❯

experience. Demonstrated leadership in managing technical teams, balancing innovation with on-time delivery. Active participation in hardware standards or technical working groups (e.g., RISC-V committees) is a strong advantage. Multiple patents or publications reflecting groundbreaking work in hardware design and architectural innovation. More ❯

bridge the gap between architectural excellence and user experience. Required: 5+ years of relevant experience Familiar with CPU instruction set architecture, e.g. Arm, RISC-V Familiar with general purpose CPU micro-architecture, such as pipelining, out-of-order execution, and caches Strong data analysis skill and software development More ❯

+ stock options! I'm currently partnered with a Semiconductor start-up, based in Silicon Valley. They are working on re-imagining Silicon, creating RISCV based computing platforms aimed at transforming the industry. As a Principal Performance Modelling Engineer you will develop functional and timing simulators, undertake performance analysis for More ❯

+ stock options! I'm currently partnered with a Semiconductor start-up, based in Silicon Valley. They are working on re-imagining Silicon, creating RISCV based computing platforms aimed at transforming the industry. As a Principal Performance Modelling Engineer you will develop functional and timing simulators, undertake performance analysis for More ❯

+ stock options! I'm currently partnered with a Semiconductor start-up, based in Silicon Valley. They are working on re-imagining Silicon, creating RISCV based computing platforms aimed at transforming the industry. As a Principal Performance Modelling Engineer you will develop functional and timing simulators, undertake performance analysis for More ❯

whilst complex, get to work on a wide variety of tasks. Key Skills Experience with ASIC environments at 48nm and below. Customisation of RISC-V CPUs. Implementation of modern classical decoders on FPGA/ASIC. Architecture of System on Chip solutions with at least one CPU and custom More ❯

compensation package, including healthcare, stock options, and retirement benefits Why Should You Care About This Company? A pioneering team with deep expertise in RISC-V, ARM, x86, and other CPU architectures A startup culture backed by top-tier investors and industry veterans A unique opportunity to own significant More ❯

company, I have an amazing opportunity of CPU Architecture. You will be tasked with the power and performance requirements for new CPU/RISC-V tasks. Excellent salaries available, plus the option for fully remote working within the UK (or other selected European locations. *In excess of £100k … qualified. MUST HAVE SKILLS: BSC/MSC/PHD in electronics/microelectronices/physics or similar relevant field CPU/GPU/RISC-V architecture Power/performance optimisation, modelling and simulation SoC power management UK/EU working rights More ❯