1 to 25 of 32 SystemVerilog Jobs in Cambridgeshire

Job Overview:Do not pass up this chance, apply quickly if your experience and skills match what is in the following description. We are looking for an FPGA/Embedded-Systems Engineer to join Arm’s Solution Engineering FPGA team More ❯

DSP, or FPU architectures and debugging/testing strategies. Hands-on experience with ASIC, FPGA, and physical design tools (P&R). Proficiency in SystemVerilog, C, SystemC, C++, Python, Perl, or TCL. Knowledge of place and route methodologies. Strong communication skills, both written and spoken, in English. Who we are More ❯

embedded C/C++ based SoC verification environments. Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages e.g. (SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.). Experienced in one or more of various verification methodologies - UVM/OVM, formal, low power More ❯

design methodologies used by the team. Required Skills and Experience: Experience of RTL design for complex ASIC products & SoCs using Verilog and/or SystemVerilog Experience with Arm-based designs and/or Arm System Architectures Knowledge or experience with Functional Safety concepts and standards (e.g., ISO 26262, IEC More ❯

implementation and testing, support. Proven technical and/or team leadership skills. Practical experience of working on microprocessor designs. Desirable experience: Working knowledge of SystemVerilog Assertions (SVA). Mentoring team members. Knowledge of scripting eg Python, Perl or unix shell scripting. Knowledge of assembly language (preferably ARM), C/C++ More ❯

implementation and testing, support. Proven technical and/or team leadership skills. Practical experience of working on microprocessor designs. Desirable experience: Working knowledge of SystemVerilog Assertions (SVA). Mentoring team members. Knowledge of scripting eg Python, Perl or unix shell scripting. Knowledge of assembly language (preferably ARM), C/C++ More ❯

implementation and testing, support. Proven technical and/or team leadership skills. Practical experience of working on microprocessor designs. Desirable experience: Working knowledge of SystemVerilog Assertions (SVA). Mentoring team members. Knowledge of scripting eg Python, Perl or unix shell scripting. Knowledge of assembly language (preferably ARM), C/C++ More ❯

language. Understanding of computer architecture fundamentals, such as pipelining, exception handling, memory systems. Perhaps some practical experience of working on microprocessor designs. Familiarity with SystemVerilog, maybe using a methodology such as UVM. Python programming experience, for example to automate verification flows. C++ programming experience, maybe in the context of a More ❯

language. Understanding of computer architecture fundamentals, such as pipelining, exception handling, memory systems. Perhaps some practical experience of working on microprocessor designs. Familiarity with SystemVerilog, maybe using a methodology such as UVM. Python programming experience, for example to automate verification flows. C++ programming experience, maybe in the context of a More ❯

language. Understanding of computer architecture fundamentals, such as pipelining, exception handling, memory systems. Perhaps some practical experience of working on microprocessor designs. Familiarity with SystemVerilog, maybe using a methodology such as UVM. Python programming experience, for example to automate verification flows. C++ programming experience, maybe in the context of a More ❯

of verifying CPU architectures or other complex IP (e.g. GPUs, NNAs) Fluency and the ability to write clear and concise code in languages like SystemVerilog, Python, C++, Rust, or Go Past verification ownership of multiple design blocks Analytical thinking, self-sufficiency and strong team collaboration skills Ability to work effectively More ❯

feedback and who can independently define the scope of work. Proven experience of testbench design with verification frameworks like UVM/OVM. Knowledge of SystemVerilog assertion (SVA). Exposure to different programming languages, such as C, C++ and Python. You have formal verification experience. What you can expect from us More ❯

of own work YOU SHOULD HAVE: Over 5 years recent and relevant module design experience within at least one HDL (VHDL/Verilog/SystemVerilog) Knowledge of computer systems and architecture Ability to write clear and concise code Experience with digital circuit simulation User knowledge of Linux Knowledge of versioning More ❯

GPU systems. Prior working knowledge of crafting scalable memory systems, cache coherence, and address translation. Must have written a whole lot of HDL (Verilog, SystemVerilog, VHDL) code at some point in your career. Strong programming and coding skills is essential. Demonstrative knowledge of GPU systems and prior working experience in More ❯

GPU systems. Prior working knowledge of crafting scalable memory systems, cache coherence, and address translation. Must have written a whole lot of HDL (Verilog, SystemVerilog, VHDL) code at some point in your career. Strong programming and coding skills is essential. Demonstrative knowledge of GPU systems and prior working experience in More ❯

GPU systems. Prior working knowledge of crafting scalable memory systems, cache coherence, and address translation. Must have written a whole lot of HDL (Verilog, SystemVerilog, VHDL) code at some point in your career. Strong programming and coding skills is essential. Demonstrative knowledge of GPU systems and prior working experience in More ❯

Ability to lead technical discussions across architecture, firmware, software, and validation teams. "Nice To Have" Skills and Experience : Familiarity with RTL design, UVM/SystemVerilog, or hardware verification flows. Experience with trusted execution environments (TEEs) and secure monitor implementation. Understanding of secure firmware update mechanisms (rollback protection, anti-cloning). More ❯

Our client is disrupting the Space industry with cutting-edge technology, tackling some of the world’s most pressing challenges in Earth Observation. Backed by the UK Space Agency, they’re aiming to be a key player in the thermal More ❯

About Us Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop new and highly innovative electronic products faster and more cost-effectively. Our customers use our tools More ❯

Our client is disrupting the Space industry with cutting-edge technology, tackling some of the world’s most pressing challenges in Earth Observation. Backed by the UK Space Agency, they’re aiming to be a key player in the thermal More ❯

What You’ll Do Work closely with hardware designers and system architects to define and own verification plans based on design specifications Develop scalable SystemVerilog testbenches , including checkers, coverage groups, and reference models Design and run self-checking, directed, and randomized tests Maintain the verification environment, including tracking regressions, bugs … commercial experience in functional verification , with ownership of verification strategy and planning Expertise in testbench design using frameworks like UVM or OVM Proficiency with SystemVerilog assertions (SVA) Familiarity with multiple programming languages (e.g., C, C++, Python ) Visa sponsorship will be provided for candidates who require. Please note, you must already More ❯

What You’ll Do Work closely with hardware designers and system architects to define and own verification plans based on design specifications Develop scalable SystemVerilog testbenches , including checkers, coverage groups, and reference models Design and run self-checking, directed, and randomized tests Maintain the verification environment, including tracking regressions, bugs … commercial experience in functional verification , with ownership of verification strategy and planning Expertise in testbench design using frameworks like UVM or OVM Proficiency with SystemVerilog assertions (SVA) Familiarity with multiple programming languages (e.g., C, C++, Python ) Visa sponsorship will be provided for candidates who require. Please note, you must already More ❯

What You’ll Do Work closely with hardware designers and system architects to define and own verification plans based on design specifications Develop scalable SystemVerilog testbenches , including checkers, coverage groups, and reference models Design and run self-checking, directed, and randomized tests Maintain the verification environment, including tracking regressions, bugs … commercial experience in functional verification , with ownership of verification strategy and planning Expertise in testbench design using frameworks like UVM or OVM Proficiency with SystemVerilog assertions (SVA) Familiarity with multiple programming languages (e.g., C, C++, Python ) Visa sponsorship will be provided for candidates who require. Please note, you must already More ❯

Design Engineer is sought to join a dynamic team. The ideal candidate will have a strong background in RTL Design and be proficient in SystemVerilog and Verilog. This position offers the opportunity to work on cutting-edge projects and contribute to the development of innovative solutions in the field of … working with and huge growth plans. Responsibilities Collaborates with cross-functional teams to define and implement ASIC architectures Designs and develops RTL code using SystemVerilog and Verilog Conducts design verification and ensures compliance with specifications Participates in the integration and testing of ASICs Contributes to the improvement of design methodologies … Bachelor's or Master's degree in Electrical Engineering or related field Demonstrates a solid understanding of ASIC design principles and methodologies Proficient in SystemVerilog, Verilog, and RTL Design Possesses familiarity with security-related applications and protocols, which is a plus Exhibits strong problem-solving skills and attention to detail More ❯

Design Engineer is sought to join a dynamic team. The ideal candidate will have a strong background in RTL Design and be proficient in SystemVerilog and Verilog. This position offers the opportunity to work on cutting-edge projects and contribute to the development of innovative solutions in the field of … working with and huge growth plans. Responsibilities Collaborates with cross-functional teams to define and implement ASIC architectures Designs and develops RTL code using SystemVerilog and Verilog Conducts design verification and ensures compliance with specifications Participates in the integration and testing of ASICs Contributes to the improvement of design methodologies … Bachelor's or Master's degree in Electrical Engineering or related field Demonstrates a solid understanding of ASIC design principles and methodologies Proficient in SystemVerilog, Verilog, and RTL Design Possesses familiarity with security-related applications and protocols, which is a plus Exhibits strong problem-solving skills and attention to detail More ❯