1 to 25 of 66 Tcl Jobs in the UK

prior to implementation. Key Requirements: Strong FPGA/SoC design background with RTL skills in (System) Verilog and scripting skills in languages such as TCL, Python, etc. Experience implementing designs on AMD Xilinx UltraScale devices using the Vivado tool suite. Detailed understanding of timing constraints and ability to improve designs more »

/CD, Artifactory. Experience with application layer protocols, such as DNP, 1588, MQTT, and more. Knowledge of electronic components and PCB reworking. Experience with TCL scripting. Equal Employment Opportunity Statement Individuals seeking employment at Camlin are considered without regard to race, colour, religion, national origin, age, sex, marital status, ancestry more »

Test & Measurement or scientific markets. Experience with tools such as Vivado, Modelsim, Visual Studio, Git, and Jira, as well as scripting languages (Python, Perl, TCL), Clock Domain Crossing techniques, and High-Level Synthesis, will be an advantage. We are looking for a detail-oriented, creative, and organised individual who can more »

subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet. Development and deployment of large SoCs on emulation platforms. Automation experience with shell programming/scripting (e.g., Tcl, Perl, Python etc.). In Return: This is a new team, and there is plenty of opportunity to shape its future, and your own growth more »

FPGA tool flows (synthesis, partitioning, place & route, timing analysis) Excellent skills in SystemVerilog (primarily) and also Verilog or VHDL Scripting and automation, such as TCL and Python Experience using tools such as Questa, ModelSim, GHDL, Verilator and cocotb Experience using simulation, analysis and synthesis tools such as Quartus, Vivado or more »

and practical experience of working on Processor based system designs Technical team leadership, mentoring or coaching experience. Knowledge of shell programming/scripting (e.g. Tcl Perl, Python etc.) "Nice To Have" Skills and Experience: High level programming experience such as C/C++ and/or assembly language programming Experience more »

C/C++ based SoC verification environments. Knowledge of assembly language (preferably ARM), and hardware verification languages e.g. SystemVerilog, shell programming/scripting (e.g. Tcl, Perl, Python etc.). Experienced in one or more of various verification methodologies - UVM, formal, low power, emulation. Exposure to all stages of verification: requirements more »

Verilog, or VHDL. Exposure to all stages of design: concept, specification, implementation, testing, documentation, and support. Proficiency in UNIX and scripting languages such as TCL, Perl, Python, or shell scripting. Prior technical and/or team leadership skills required for more senior positions. 'Nice to Have' skills and Experience: Knowledge more »

Verilog, or VHDL. Exposure to all stages of design: concept, specification, implementation, testing, documentation, and support. Proficiency in UNIX and scripting languages such as TCL, Perl, Python, or shell scripting. Prior technical and/or team leadership skills required for more senior positions. 'Nice to Have' skills and Experience: Knowledge more »

Verilog, or VHDL. Exposure to all stages of design: concept, specification, implementation, testing, documentation, and support. Proficiency in UNIX and scripting languages such as TCL, Perl, Python, or shell scripting. Prior technical and/or team leadership skills required for more senior positions. 'Nice to Have' skills and Experience: Knowledge more »

with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols Ethernet, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git High speed transceivers Memory controllers PCB Layout ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : Senior FPGA Engineer Location : Remote within reach of Portsmouth Salary : £60-95k Benefits: Bonus more »

with Verilog, System Verilog Senior FPGA Engineer desirable skills High-speed protocols – Ethernet, USB, NVMe, CXL etc C/C++. Linux, Bash, Python, VHDL, tcl Jira, Git High speed transceivers Memory controllers PCB Layout ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Position : Senior FPGA Engineer Location : Remote within reach of Portsmouth Salary : £60-95k Benefits: Bonus more »

of FPGA tool flows (synthesis, partitioning, place&route, timing analysis). Excellent skills in SystemVerilog/Verilog/VHDL. Scripting and automation, such as TCL and Python. Experience using Questa, ModelSim, GHDL, Verilator, cocotb. Experience using Quartus/Vivado/Vitis. Experience in PCIe driver development. Experience with embedded systems more »

/high-bandwith memory/cache chorency clock, timing constraints ISO26262 functional safety for the automotive industry Scripting - python, C/C++, sytem C, TcL more »

Translating design requirements into RTL Deriving functional requirements for verification Systemverilog UVM test benches Scripting languages & REST API’s (e.g. Perl/Python/TCL) Team player with good verbal and written communication skills Principal/Lead Storage Verification Engineer Desirable skills: Experience of Formal Verification (Jasper Gold or VC more »

of: Translating design requirements into RTL Deriving functional requirements for verification Systemverilog UVM test benches Scripting languages & REST APIs (e.g. Perl/Python/TCL) Team player with good verbal and written communication skills Principal/Lead ASIC Design and Verification Engineer Desirable skills: Experience of Formal Verification (Jasper Gold more »

designing digital processing components and algorithms in Matlab/Simulink design for HDL coder and targeting FPGA devices Must be proficient in scripting language Tcl to support FPGA Vivado/Libero design and Modelsim simulation. Experience of processor system block design, schematic design, IP integrator, and VHDL firmware development Experience more »

concept, specification, implementation, power/performance analysis, optimisation, testing, documentation, and support. Produce specifications and documentation for sophisticated designs. Knowledge of shell scripting (e.g., Tcl, Perl, Python, etc.). "Nice To Have" Skills and Experience: Experience with Arm-based designs and/or Arm System Architectures. High level programming experience more »

concept, specification, implementation, power/performance analysis, optimisation, testing, documentation, and support. Produce specifications and documentation for sophisticated designs. Knowledge of shell scripting (e.g., Tcl, Perl, Python, etc.). "Nice To Have" Skills and Experience: Experience with Arm-based designs and/or Arm System Architectures. High level programming experience more »

learn: Translating design requirements into RTL Deriving functional requirements for verification Systemverilog UVM test benches Scripting languages & REST APIs (e.g. Perl/Python/TCL) Team player with good verbal and written communication skills Storage Verification Desirable skills: Experience of Formal Verification (Jasper Gold or VC_Formal) Experience using SV more »

learn: Translating design requirements into RTL Deriving functional requirements for verification Systemverilog UVM test benches Scripting languages & REST APIs (e.g. Perl/Python/TCL) Team player with good verbal and written communication skills Formal Verification Desirable skills: Experience using SV UVM 1800.2 Familiarity with C/C++ Experience with more »

you across the UK or abroad for technical reviews. What we need from you What you really must have: Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet more »

you across the UK or abroad for technical reviews. What we need from you What you really must have: Design tools such as Xilinx, TCL, Verilog, System Verilog and UVM FPGA architectures such as Xilinx 7. Xilinx UltraScale; Intel (Altera) or Microsemi (Actel). Fast interfaces such as PCIe, Ethernet more »

development of new Test-Bench modules Technical Skills/Qualifications Extensive experience of VHDL for FPGA development Familiarity with current FPGA and SoC technologies TCL scripting Experience of Modelsim/Questasim Experience with Quartus tool chain. Familiarity with version control GIT/SVN/CVS etc Desirable Skills Experience of more »

development of new Test-Bench modules Technical Skills/Qualifications Extensive experience of VHDL for FPGA development Familiarity with current FPGA and SoC technologies TCL scripting Experience of Modelsim/Questasim Experience with Quartus tool chain. Familiarity with version control GIT/SVN/CVS etc Desirable Skills Experience of more »